One of the most important problems related to the design of passive UHF RFID transponder chips is the challenge of the creation of highly efficient RF to DC rectifiers. Passive UHF RFID transponders must obtain their power from the RF signals emitted by a RFID reader. UHF RFID readers have emitted power restrictions depending on the jurisdiction. For example, European standards limit the emitted RF power approximately to 2W EIRP, while the USA limit is the double of this figure, i. e. 4W EIRP.
State-of-the-art RFID transponder chips work with input RF power levels as low as -18dBm, equivalent to less than 20uW RF power. Even assuming that the input RF power is perfectly converted to the DC power by the rectifier and the chip has a single supply voltage of 1V, the chip's current drain has to be kept below 20uA. Of course, this is true only when there is a continuous RF signal emitted by the RFID reader. This is not the case during the normal operation, as the RFID reader also transmits various commands to the transponder using ASK modulation further limiting the average RF power available to the RFID transponder. Thus, the RFID transponder chips are severely limited by the available RF power and would need highly efficient RF-DC rectifiers to extend their reading range.
In this design note, we looked at the design of CMOS RF-DC rectifiers used in UHF RFID transponder chips. We have analysed one of the most promising topologies, differential-drive CMOS rectifier. The simulations for a sample single-stage rectifier was presented including the output voltage and power conversion efficiency figure of merit over a range of input RF power levels.
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